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Datasheet R01DS0193EJ0210 Rev.2.10 Mar 25, 2016 Page 1 of 106 R01DS0193EJ0210 Rev.2.10 Mar 25, 2016 RL78/G12 RENESAS MCU True Low Power Platform (as low as 63 μA/MHz), 1.8V to 5.5V operation, 2 to 16 Kbyte Flash, 31 DMIPS at 24MHz, for General Purpose Applications 1. OUTLINE 1.1 Features Ultra-low power consumption technology  VDD = single power supply voltage of 1.8 to 5.5 V which can operate at a low voltage  HALT mode  STOP mode  SNOOZE mode RL78 CPU core  CISC architecture with 3-stage pipeline  Minimum instruction execution time: Can be changed from high speed (0.04167 s: @ 24 MHz operation with high-speed on-chip oscillator) to ultra-low speed (1 s: @ 1 MHz operation)  Address space: 1 MB  General-purpose registers: (8-bit register x 8) x 4 banks  On-chip RAM: 256 B to 2 KB Code flash memory  Code flash memory: 2 to 16 KB  Block size: 1 KB  Prohibition of block erase and rewriting (security function)  On-chip debug function  Self-programming (with flash shield window function) Data flash memory Note  Data flash memory: 2 KB  Back ground operation (BGO): Instructions are executed from the program memory while rewriting the data flash memory.  Number of rewrites: 1,000,000 times (TYP.)  Voltage of rewrites: VDD = 1.8 to 5.5 V High-speed on-chip oscillator  Select from 24 MHz, 16 MHz, 12 MHz, 8 MHz, 6 MHz, 4 MHz, 3 MHz, 2 MHz, and 1 MHz  High accuracy: +/- 1.0 % (VDD = 1.8 to 5.5 V, TA = -20 to +85 °C) Operating ambient temperature  TA = -40 to +85 °C (A: Consumer applications, D: Industrial applications)  TA = -40 to +105 °C (G: Industrial applications) Note Power management and reset function  On-chip power-on-reset (POR) circuit  On-chip voltage detector (LVD) (Select interrupt and reset from 12 levels) DMA (Direct Memory Access) controller Note  2 channels  Number of clocks during transfer between 8/16-bit SFR and internal RAM: 2 clocks Multiplier and divider/multiply-accumulator  16 bits x 16 bits = 32 bits (Unsigned or signed)  32 bits x 32 bits = 32 bits (Unsigned)  16 bits x 16 bits + 32 bits = 32 bits (Unsigned or signed) Serial interface  CSI : 1 to 3 channels  UART : 1 to 3 channels  Simplified I2 C communication : 0 to 3 channels  I2 C communication : 1 channel Timer  16-bit timer : 4 to 8 channels  12-bit interval timer : 1 channel  Watchdog timer : 1 channel (operable with the dedicated low-speed on-chip oscillator) A/D converter  8/10-bit resolution A/D converter (VDD = 1.8 to 5.5 V)  8 to 11 channels, internal reference voltage (1.45 V), and temperature sensor Note I/O port  I/O port: 18 to 26 (N-ch open drain I/O [withstand voltage of 6 V]: 2, N-ch open drain I/O [VDD withstand voltage]: 4 to 9)  Can be set to N-ch open drain, TTL input buffer, and on-chip pull-up resistor  Different potential interface: Can connect to a 1.8/2.5/3 V device  On-chip key interrupt function  On-chip clock output/buzzer output controller Others  On-chip BCD (binary-coded decimal) correction circuit Note Can be selected only in HS (high-speed main) mode. Remark The functions mounted depend on the product. See 1.7 Outline of Functions. * There is difference in specifications between every product. Please refer to specification for details. RL78/G12 1. OUTLINE R01DS0193EJ0210 Rev.2.10 Mar 25, 2016 Page 2 of 106  ROM, RAM capacities Code flash Data flash RAM 20 pins 24 pins 30 pins 2 KB   R5F102AA  2 KB   R5F103AA 2 KB R5F1026A Note 1 R5F1027A Note 1  16 KB  1.5 KB R5F1036A Note 1 R5F1037A Note 1  2KB R5F10269 Note 1 R5F10279 Note 1 12 KB R5F102A9  1 KB R5F10369 Note 1 R5F10379 Note 1 R5F103A9 2 KB R5F10268 Note 1 R5F10278 Note 1 8 KB R5F102A8  768 B R5F10368 Note 1 R5F10378 Note 1 R5F103A8 4 KB 2KB R5F10267 R5F10277 R5F102A7  512 B R5F10367 R5F10377 R5F103A7 2 KB R5F10266 Note 2 2 KB    256 B R5F10366 Note 2   Notes 1. This is 640 bytes when the self-programming function or data flash function is used. (For details, see CHAPTER 3 CPU ARCHITECTURE.) 2. The self-programming function cannot be used for R5F10266 and R5F10366. Caution When the flash memory is rewritten via a user program, the code flash area and RAM area are used because each library is used. When using the library, refer to RL78 Family Flash Self Programming Library Type01 User's Manual and RL78 Family Data Flash Library Type04 User's Manual. RL78/G12 1. OUTLINE R01DS0193EJ0210 Rev.2.10 Mar 25, 2016 Page 3 of 106 1.2 List of Part Numbers Figure 1-1. Part Number, Memory Size, and Package of RL78/G12 Part No. R 5 F 1 0 2 A A A x x x S P #V0 Package type: ROM number (Omitted with blank products) ROM capacity: RL78/G12 group Renesas MCU Renesas semiconductor product SP : LSSOP, 0.65 mm pitch NA : HWQFN, 0.50 mm pitch #U5 #V0, #V5 #W5 #X0, #X5 6 : 2 KB 7 : 4 KB 8 : 8 KB 9 : 12 KB A : 16 KB Pin count: 6 : 20-pin 7 : 24-pin A : 30-pin Classification: A : Consumer applications, TA = -40°C to +85°C D : Industrial applications, TA = -40°C to +85°C G : Industrial applications, TA = -40°C to +105°C Memory type: F : Flash memory Packaging specifications: 102Note 1 103Notes 1, 2 : Tray (HWQFN) : Tray (LSSOP30), Tube (LSSOP20) : Embossed Tape (HWQFN) : Embossed Tape (LSSOP30, LSSOP20) Notes 1. For details about the differences between the R5F102 products and the R5F103 products of RL78/G12, see 1.1 Differences between the R5F102 Products and the R5F103 Products. 2. Products only for "A: Consumer applications (TA = -40 to +85C)" and "D: Industrial applications (TA = -40 to +85C)" RL78/G12 1. OUTLINE R01DS0193EJ0210 Rev.2.10 Mar 25, 2016 Page 4 of 106 Table 1-1. List of Ordering Part Numbers Pin count Package Data flash Fields of Application Part Number A R5F1026AASP#V5, R5F10269ASP#V5, R5F10268ASP#V5, R5F10267ASP#V5, R5F10266ASP#V5 R5F1026AASP#X5, R5F10269ASP#X5, R5F10268ASP#X5, R5F10267ASP#X5, R5F10266ASP#X5 D R5F1026ADSP#V5, R5F10269DSP#V5, R5F10268DSP#V5, R5F10267DSP#V5, R5F10266DSP#V5 R5F1026ADSP#X5, R5F10269DSP#X5, R5F10268DSP#X5, R5F10267DSP#X5, R5F10266DSP#X5 Mounted G R5F1026AGSP#V5, R5F10269GSP#V5, R5F10268GSP#V5, R5F10267GSP#V5, R5F10266GSP#V5 R5F1026AGSP#X5, R5F10269GSP#X5, R5F10268GSP#X5, R5F10267GSP#X5, R5F10266GSP#X5 A R5F1036AASP#V5, R5F10369ASP#V5, R5F10368ASP#V5, R5F10367ASP#V5, R5F10366ASP#V5 R5F1036AASP#X5, R5F10369ASP#X5, R5F10368ASP#X5, R5F10367ASP#X5, R5F10366ASP#X5 20 pins 20-pin plastic LSSOP (4.4  6.5 mm, 0.65 mm pitch) Not mounted D R5F1036ADSP#V5, R5F10369DSP#V5, R5F10368DSP#V5, R5F10367DSP#V5, R5F10366DSP#V5 R5F1036ADSP#X5, R5F10369DSP#X5, R5F10368DSP#X5, R5F10367DSP#X5, R5F10366DSP#X5 A R5F1027AANA#U5, R5F10279ANA#U5, R5F10278ANA#U5, R5F10277ANA#U5 R5F1027AANA#W5, R5F10279ANA#W5, R5F10278ANA#W5, R5F10277ANA#W5 D R5F1027ADNA#U5, R5F10279DNA#U5, R5F10278DNA#U5, R5F10277DNA#U5 R5F1027ADNA#W5, R5F10279DNA#W5, R5F10278DNA#W5, R5F10277DNA#W5 Mounted G R5F1027AGNA#U5, R5F10279GNA#U5, R5F10278GNA#U5, R5F10277GNA#U5 R5F1027AGNA#W5, R5F10279GNA#W5, R5F10278GNA#W5, R5F10277GNA#W5 A R5F1037AANA#V5, R5F10379ANA#V5, R5F10378ANA#V5, R5F10377ANA#V5 R5F1037AANA#X5, R5F10379ANA#X5, R5F10378ANA#X5, R5F10377ANA#X5 24 pins 24-pin plastic HWQFN (4  4 mm, 0.5 mm pitch) Not mounted D R5F1037ADNA#V5, R5F10379DNA#V5, R5F10378DNA#V5, R5F10377DNA#V5 R5F1037ADNA#X5, R5F10379DNA#X5, R5F10378DNA#X5, R5F10377DNA#X5 A R5F102AAASP#V0, R5F102A9ASP#V0, R5F102A8ASP#V0, R5F102A7ASP#V0 R5F102AAASP#X0, R5F102A9ASP#X0, R5F102A8ASP#X0, R5F102A7ASP#X0 D R5F102AADSP#V0, R5F102A9DSP#V0, R5F102A8DSP#V0, R5F102A7DSP#V0 R5F102AADSP#X0, R5F102A9DSP#X0, R5F102A8DSP#X0, R5F102A7DSP#X0 Mounted G R5F102AAGSP#V0, R5F102A9GSP#V0, R5F102A8GSP#V0, R5F102A7GSP#V0 R5F102AAGSP#X0, R5F102A9GSP#X0, R5F102A8GSP#X0, R5F102A7GSP#X0 A R5F103AAASP#V0, R5F103A9ASP#V0, R5F103A8ASP#V0, R5F103A7ASP#V0 R5F103AAASP#X0, R5F103A9ASP#X0, R5F103A8ASP#X0, R5F103A7ASP#X0 30 pins 30-pin plastic LSSOP (7.62 mm (300), 0.65 mm pitch ) Not mounted D R5F103AADSP#V0, R5F103A9DSP#V0, R5F103A8DSP#V0, R5F103A7DSP#V0 R5F103AADSP#X0, R5F103A9DSP#X0, R5F103A8DSP#X0, R5F103A7DSP#X0 Note For fields of application, see Figure 1-1 Part Number, Memory Size, and Package of RL78/G12. Caution The ordering part numbers represent the numbers at the time of publication. For the latest ordering part numbers, refer to the target product page of the Renesas Electronics website. RL78/G12 1. OUTLINE R01DS0193EJ0210 Rev.2.10 Mar 25, 2016 Page 5 of 106 1.3 Differences between the R5F102 Products and the R5F103 Products The following are differences between the R5F102 products and the R5F103 products.  Whether the data flash memory is mounted or not  High-speed on-chip oscillator oscillation frequency accuracy  Number of channels in serial interface  Whether the DMA function is mounted or not  Whether a part of the safety functions are mounted or not 1.3.1 Data Flash The data flash memory of 2 KB is mounted on the R5F102 products, but not on the R5F103 products. Product Data Flash R5F102 products R5F1026A, R5F1027A, R5F102AA, R5F10269, R5F10279, R5F102A9, R5F10268, R5F10278, R5F102A8, R5F10267, R5F10277, R5F102A7, R5F10266 Note 2KB R5F103 products R5F1036A, R5F1037A, R5F103AA, R5F10369, R5F10379, R5F103A9, R5F10368, R5F10378 R5F103A8, R5F10367, R5F10377, R5F103A7, R5F10366 Not mounted Note The RAM in the R5F10266 has capacity as small as 256 bytes. Depending on the customer's program specification, the stack area to execute the data flash library may not be kept and data may not be written to or erased from the data flash memory. Caution When the flash memory is rewritten via a user program, the code flash area and RAM area are used because each library is used. When using the library, refer to RL78 Family Flash Self Programming Library Type01 User's Manual and RL78 Family Data Flash Library Type04 User's Manual. RL78/G12 1. OUTLINE R01DS0193EJ0210 Rev.2.10 Mar 25, 2016 Page 6 of 106 1.3.2 On-chip oscillator characteristics (1) High-speed on-chip oscillator oscillation frequency of the R5F102 products Oscillator Condition MIN MAX Unit TA = -20 to +85 C -1.0 +1.0 TA = -40 to -20 C -1.5 +1.5 High-speed on-chip oscillator oscillation frequency accuracy TA = +85 to +105 C -2.0 +2.0 % (2) High-speed on-chip oscillator oscillation frequency of the R5F103 products Oscillator Condition MIN MAX Unit High-speed on-chip oscillator oscillation frequency accuracy TA = -40 to + 85 C -5.0 +5.0 % 1.3.3 Peripheral Functions The following are differences in peripheral functions between the R5F102 products and the R5F103 products. R5F102 product R5F103 product RL78/G12 20, 24 pin product 30 pin product 20, 24 pin product 30 pin product UART 1 channel 3 channels 1 channel CSI 2 channels 3 channels 1 channel Serial interface Simplified I2 C 2 channels 3 channels None DMA function 2 channels None CRC operation Yes None RAM guard Yes None Safety function SFR guard Yes None RL78/G12 1. OUTLINE R01DS0193EJ0210 Rev.2.10 Mar 25, 2016 Page 7 of 106 1.4 Pin Configuration (Top View) 1.4.1 20-pin products  20-pin plastic LSSOP (4.4  6.5 mm, 0.65 mm pitch) 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 P21/ANI1/AV REFM P22/ANI2 P23/ANI3 P10/ANI16/PCLBUZ0/SCK00/SCL00 P11/ANI17/SI00/RxD0/SDA00 /TOOLRxD P12/ANI18/SO00/TxD0/TOOLTxD P13/ANI19/TI00/TO00/INTP2 P14/ANI20/TI01/TO01/INTP3 P61/KR5/SDAA0/(RxD0) P60/KR4/SCLA0/(TxD0) P20/ANI0/AVREFP P40/KR0/TOOL0 P137/INTP0 P122/KR2/X2/EXCLK/(TI02)/(INTP2) P121/KR3/X1/(TI03)/(INTP3) VSS VDD P42/ANI21/SCK01 /SCL01 Note Note/TI03/TO03 P41/ANI22/SO01 /SDA01 Note Note/TI02/TO02/INTP1 P125/KR1/SI01 /RESET Note Note Note RL78/G12 (Top View) Note Provided only in the R5F102 products. Remarks 1. For pin identification, see 1.5 Pin Identification. 2. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection register (PIOR). See Figure 4-8 Format of Peripheral I/O Redirection Register (PIOR). RL78/G12 1. OUTLINE R01DS0193EJ0210 Rev.2.10 Mar 25, 2016 Page 8 of 106 1.4.2 24-pin products  24-pin plastic HWQFN (4  4 mm, 0.5 mm pitch) 1 2 3 4 5 6 12 11 10 9 8 7 18 17 16 15 14 13 19 20 21 22 23 24 P61/KR5/SDAA0/(RxD0) P60/KR4/SCLA0/(TxD0) P03/KR9 P02/KR8/(SCK01)Note/(SCL01)Note P01/KR7/(SO01)Note/(SDA01)Note P00/KR6/(SI01)Note P22/ANI2 P21/ANI1/AVREFM P20/ANI0/AVREFP P42/ANI21/SCK01Note/SCL01Note/TI03/TO03 P41/ANI22/SO01Note/SDA01Note/TI02/TO02/INTP1 P40/KR0/TOOL0 INDEX MARK exposed die pad VDD VSS P122/KR2/X2/EXCLK/(TI02)/(INTP2) P121/KR3/X1/(TI03)/(INTP3) P137/INTP0 P125/KR1/SI01Note/RESET P11/ANI17/SI00/RxD0/SDA00 P13/ANI19/TO00/INTP2 P14/ANI20/TO01/INTP3 Note/TOOLRxD P10/ANI16/PCLBUZ0/SCK00/SCL00 P12/ANI18/SO00/TxD0/TOOLTxD Note P23/ANI3 RL78/G12 (Top View) Note Provided only in the R5F102 products. Remarks 1. For pin identification, see 1.5 Pin Identification. 2. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection register (PIOR). See Figure 4-8 Format of Peripheral I/O Redirection Register (PIOR). 3. It is recommended to connect an exposed die pad to Vss. RL78/G12 1. OUTLINE R01DS0193EJ0210 Rev.2.10 Mar 25, 2016 Page 9 of 106 1.4.3 30-pin products  30-pin plastic LSSOP (7.62 mm (300), 0.65 mm pitch) 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 P20/ANI0/AVREFP P01/ANI16/TO00/RxD1Note P00/ANI17/TI00/TxD1Note P120/ANI19 P40/TOOL0 RESET P137/INTP0 P122/X2/EXCLK P121/X1 REGC VSS VDD P60/SCLA0 P61/SDAA0 P31/TI03/TO03/INTP4/PCLBUZ0 P21/ANI1/AVREFM P22/ANI2 P23/ANI3 P147/ANI18 P10/SCK00/SCL00Note/(TI07/TO07) P11/SI00/RxD0/TOOLRxD/SDA00Note/(TI06/TO06) P13/TxD2Note/SO20Note/(SDAA0)Note/(TI04/TO04) P14/RxD2Note/SI20Note/SDA20Note/(SCLA0)Note/(TI03/TO03) P15/PCLBUZ1/SCK20Note/SCL20Note/(TI02/TO02) P12/SO00/TxD0/TOOLTxD/(TI05/TO05) P16/TI01/TO01/INTP5/(RxD0) P17/TI02/TO02/(TxD0) P30/INTP3/SCK11Note/SCL11Note P50/INTP1/SI11Note/SDA11Note P51/INTP2/SO11Note RL78/G12 (Top View) Note Provided only in the R5F102 products. Caution Connect the REGC pin to VSS via capacitor (0.47 to 1 F). Remarks 1. For pin identification, see 1.5 Pin Identification. 2. Functions in parentheses in the above figure can be assigned via settings in the peripheral I/O redirection register (PIOR). See Figure 4-8 Format of Peripheral I/O Redirection Register (PIOR). RL78/G12 1. OUTLINE R01DS0193EJ0210 Rev.2.10 Mar 25, 2016 Page 10 of 106 1.5 Pin Identification ANI0 to ANI3, ANI16 to ANI22: Analog input REGC: RESET: Regulator Capacitance Reset AVREFM: Analog Reference Voltage Minus AVREFP: Analog reference voltage plus RxD0 to RxD2: SCK00, SCK01, SCK11, Receive Data EXCLK: External Clock Input (Main System Clock) SCK20: SCL00, SCL01, Serial Clock Input/Output INTP0 to INTP5 Interrupt Request From Peripheral KR0 to KR9: Key Return SCL11, SCL20, SCLA0: SDA00, SDA01, SDA11, Serial Clock Input/Output P00 to P03: Port 0 SDA20, SDAA0: Serial Data Input/Output P10 to P17: Port 1 SI00, SI01, SI11, SI20: Serial Data Input P20 to P23: Port 2 SO00, SO01, SO11, P30 to P31: Port 3 SO20: Serial Data Output P40 to P42: Port 4 TI00 to TI07: Timer Input P50, P51: Port 5 TO00 to TO07: Timer Output P60, P61: Port 6 TOOL0: Data Input/Output for Tool P120 to P122, P125: Port 12 P137: Port 13 TOOLRxD, TOOLTxD: Data Input/Output for External Device P147: Port 14 TxD0 to TxD2: Transmit Data VDD: Power supply VSS: Ground PCLBUZ0, PCLBUZ1: Programmable Clock Output/ Buzzer Output X1, X2: Crystal Oscillator (Main System Clock) RL78/G12 1. OUTLINE R01DS0193EJ0210 Rev.2.10 Mar 25, 2016 Page 11 of 106 1.6 Block Diagram 1.6.1 20-pin products PORT 1 P10 to P14 PORT 2 4 P20 to P23 PORT 4 P40 to P42 PORT 6 2 PORT 12 5 CRCNote PCLBUZ0 P60, P61 P121, P122, P125 RESET Low Speed On-chip oscillator 15 kHz 9 6 4 KR0 to KR5 INTP0 to INTP3 ANI2, ANI3, ANI16 to ANI22 ANI0/AVREFP ANI1/AVREFM PORT 13 P137 3 3 Multiplier & divider multiplyaccumulator On-chip debug BCD adjustment IICA0 TOOL0 SCLA0 SDAA0 Power-on reset/voltage detector Clock Generator + Reset Generator High-Speed on-chip oscillator 1 to 24 MHz TOOL TxD TOOL RxD RL78 CPU core Buzzer/clock output control Key return