MC14516B

Binary Up/Down Counter

The MC14516B synchronous up/down binary counter is

constructed with MOS P−channel and N−channel enhancement mode

devices in a monolithic structure.

This counter can be preset by applying the desired value, in binary,

to the Preset inputs (P0, P1, P2, P3) and then bringing the Preset

Enable (PE) high. The direction of counting is controlled by applying

a high (for up counting) or a low (for down counting) to the

UP/DOWN input. The state of the counter changes on the positive

transition of the clock input.

Cascading can be accomplished by connecting the Carry Out to the

Carry In of the next stage while clocking each counter in parallel. The

outputs (Q0, Q1, Q2, Q3) can be reset to a low state by applying a high

to the reset (R) pin.

This CMOS counter finds primary use in up/down and difference

counting. Other applications include: (1) Frequency synthesizer

applications where low power dissipation and/or high noise immunity

is desired, (2) Analog−to−Digital and Digital−to−Analog conversions,

and (3) Magnitude and sign generation.

Features

• Diode Protection on All Inputs

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Internally Synchronous for High Speed

• Logic Edge−Clocked Design — Count Occurs on Positive Going

Edge of Clock

• Single Pin Reset

• Asynchronous Preset Enable Operation

• Capable of Driving Two Low−Power TTL Loads or One

Low−Power Schottky Load Over the Rated Temperature Range

• These Devices are Pb−Free and are RoHS Compliant

• NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

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