MX25U12832FZNI02原装 NOR FLASH

1.8V, 128M-BIT [x 1/x 2/x 4] CMOS MXSMIO? (SERIAL MULTI I/O) FLASH MEMORY

 

MX25U12832FZNI02原装 NOR FLASH 的技术参数：

 

KLMBG2JETD-B041 10K 22+

KLMAG1JETD-B041 10K 22+

KLM8G1GETF-B041 10K 22+

KLM4G1FETE-B041 10K 22+

K4E8E324EB-EGCF 10K 22+

K4E6E304EB-EGCF 10K 22+

K4E6E304EC-EGCG 10K 22+

K4B4G1646E-BCNB 10K 22+

K4A8G165WB-BCRC 10K 22+

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MX25U12832FZNI02原装 NOR FLASH 的描述：

MX25U12832F is 128Mb bits Serial NOR Flash memory, which is configured as 16,777,216 x 8 internally. When it is in two or four I/O mode, the structure becomes 67,108,864 bits x 2 or 33,554,432 bits x 4. MX25U12832F features a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode.

 

The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input.When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits in-put and data output.

 

When it is in four I/O read mode, the SI pin, SO pin, WP# and RESET# pin (of the 8-pin pack-ages) become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output.

 

The MX25U12832F MXSMIO? (Serial Multi I/O) provides sequential read operation on the whole chip.After program/erase command is issued, auto program/erase algorithms which program/erase and verify the speci-fied page  or  sector/block locations will be executed.  

 

Program  command is executed on  byte  basis, or page (256 bytes) basis, or word basis. Erase command is executed on 4K-byte sector, 32K-byte block, or 64K-byte block, or whole chip basis.

 

 The status read command can be issued to detect completion status of a program or erase operation via WIP bit.Advanced security features enhance the protection and security functions.

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