S5PC100A80-LA40集多种功能于一身，可用于无线通信、GPS、摄像头、手机游戏、便携式多媒体播放器、移动电视、PDA等等.
S5PC100 采用了32位的ARMcortex A8精简指令集的一种处理器，并且是64/32位的内部总线结构，和*大833 MHz的运算速度。
这个处理器的视频解码能力很强大,并且省电。
主要表现有720p品质的录像和回放**30fps,
支持*实时的传送会议视频
支持MPEG(SP/ASP)/H.263(Profile3)/H.264(BP/MP/HP)编码和解码
支持电视PAL/NTSC制式输出，支持HDMI输出。
Features
-
CortexA8 based CPU Subsystem with NEON
-
32/32KB I/D Cache, 256KB L2 Cache
-
667/800MHz (O/D) Operating Frequency at 1.2 V and TBD V respectively
-
64-bit Multi-layer bus architecture
-
Advanced power management for mobile applications
-
ROM for secure booting and RAM for security function
-
8-bit ITU 601/656 Camera Interface up to 8M pixel for scaled and 16M pixel for un-scaled resolution
-
Multi Format CODEC provides encoding and decoding of MPEG-4/H.263/H.264up to 30fps@HD(720p) and decoding of MPEG-2/VC1/Divx/Xvid video up to 30fps@HD(720p)
-
JPEG codec support up to 30Mpixels/s
-
3D Graphics Acceleration with Programmable Shaderup to 10M triangles/s (Transform only)
-
2D Graphics Acceleration with BitBlitand Rotation, up to 40Mpixels/s
-
1/2/4/8 bpppalletized or 8/16/24bpp non-palletized Color-TFT support up to 2048x2048
-
TV-out for NTSC and PAL mode and HDMI 1.2 interface support with PHY
-
MIPI-HSI, MIPI-DSI and MIPI-CSI interface support
-
1-channel AC-97 audio codec interface, 2-ch PCM serial audio interface, and 3-channel 24-bit I2Sinterface support (5.1ch support)
-
2-channel S/PDIF interface support for di*al audio
-
2-channel I2C interface (up to 400KHz) support including 1-channel for HDMI
-
3-channel HS-SPI, up to 52Mbps
-
4-channel UART including 4Mbps port for Bluetooth 2.0 and IrDA port for SIR/MIR/FIR
-
On-chip U* 2.0 OTG supporting high speed (480Mbps, on-chip transceiver)
-
On-chip U* 1.1 Host supporting full speed (12Mbps, on-chip transceiver)
-
Asynchronous direct Modem Interface support including 16KB DPRAM
-
3-channel SD/SDIO/HS-MMC interface support including CE-ATA
-
CF version 3.0 interface support for HDD
-
24-channel DMA controller
-
Support 8x8 key matrix
-
10-ch 12-bit multiplexed ADC
-
2-ch CAN interface
-
Configurable GPIOs
-
Real time clock, PLL, timer with PWM and watch dog timer
-
Memory Subsystem
-
SRAM/ROM/*R/NAND Interface with x8 or x16 data bus
-
MuxedOneNANDInterface with x16 data bus
-
1-port Mobile DDR Interface with x32 data bus (up to 333Mbps/pin DDR)
-
1-port DDR2 interface with x16 or x32 data bus (333Mbps/pin DDR)
-
1-port LPDDR2 interface (up to 333Mbps/pin DDR)
