The Intel® 82571EB Gigabit Ethernet Controller is a single, compact component with two full-integrated Gigabit Ethernet Media Access Control (MAC) and physical layer (PHY) ports. The Intel 82571/82572 Gigabit Ethernet Controller is a single-port version of the controller in the same package. These devices use the PCI Express* architecture (Rev. 1.0a). The Intel 82571/82572 Gigabit Ethernet Controller enables dual- or singleport gigabit ethernet implementation in a very small area--ideal for both server and workstation network designs that have critical space constraints. The Intel 82571/82572 Gigabit Ethernet Controller provides a standard IEEE 802.3 Ethernet interface for 1000BASE-T, 100BASE-TX, and 10BASE-T applications (802.3, 802.3u, and 802.3ab). Ports also contain a Serializer-Deserializer (SERDES) to support 1000Base-SX/LX (optical fiber) and Gigabit backplane applications. In addition to managing MAC and PHY Ethernet layer functions, the controller manages PCI Express packet traffic across its transaction, link, and physical/logical layers. The Intel 82572EI Gigabit Ethernet Controller’s on-board System Management Bus (SMB) ports enable network manageability implementations required by information technology personnel for remote control and alerting via the LAN. With SMB, management packets can be routed to or from a management processor. The SMB ports enable industry standards, such as Alert Standard Format (ASF) 2.0, to be implemented using the 82571/82572 Gigabit Ethernet Controller. In addition, on-chip ASF 2.0 circuitry provides alerting and remote control capabilities with standardized interfaces. Enhanced pass-through capabilities also allow system remote control over standardized interfaces. The 82571/82572 Gigabit Ethernet Controller with PCIe* architecture is designed for high performance and low memory latency. The device is optimized to connect to a system Memory Control Hub (MCH) using four PCI Express lanes. Alternatively, the 82571/82572 Gigabit Ethernet Controller controller can connect to an I/O Control Hub (ICH6 & 7) that has a PCI Express interface. Wide internal data paths eliminate performance bottlenecks by efficiently handling large address and data words. Combining a parallel and pipe-lined logic architecture optimized for gigabit ethernet and independent transmit and receive queues, the 82571/82572 Gigabit Ethernet Controller efficiently handles packets with minimum latency. The 82571/82572 Gigabit Ethernet Controller includes advanced interrupt handling features. The 82571/82572 Gigabit Ethernet Controller uses efficient ring buffer descriptor data structures, with up to 64 packet descriptors cached on-chip. A large 48 KByte per port on-chip packet buffer maintains superior performance. In addition, using hardware acceleration, the controller offloads tasks from the host, such as TCP/UDP/IP checksum calculations and TCP segmentation. The 82571/82572 Gigabit Ethernet Controller is packaged in a 17 mm x 17 mm, 256- ball grid array.

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