TI 主页 > 半导体 > 数据转换器 > 模数转换器 > * ADC (>10MSPS) >ADS41B49 14 位 250MSPS 缓冲低功耗 ADC ADS41B49IRGZT 14 bit 250MSPS Buffered Low Power ADC

说明 The ADS41B29/B49 are members of the ultralow-power ADS4xxx *og-to-di*al converter (ADC) family, featuring integrated *og input buffers. These devices use innovative design techniques to achieve high dynamic performance, while consuming extremely low power. The *og input pins have buffers, with benefits of constant performance and input impedance across a wide frequency range. The devices are well-suited for multi-carrier, wide bandwidth communications applications such as PA linearization. The ADS41B49/29 have features such as di*al gain and offset correction. The gain option can be used to improve SFDR performance at lower full-scale input ranges, especially at high input frequencies. The integrated dc offset correction loop can be used to estimate and cancel the ADC offset. View full Description in Datasheet 特性 ADS41B49: 14-Bit, 250MSPS ADS41B29: 12-Bit, 250MSPS Integrated High-Impedance Analog Input Buffer: Input Capacitance: 2pF 200MHz Input Resistance: 3kΩ Maximum Sample Rate: 250MSPS Ultralow Power: 1.8V Analog Power: 180mW 3.3V Buffer Power: 96mW I/O Power: 135mW (DDR LVDS) High Dynamic Performance: SNR: 69dBFS at 170MHz SFDR: 82.5dBc at 170MHz Output Interface: Double Data Rate (DDR) LVDS with Programmable Swing and Strength: Standard Swing: 350mV Low Swing: 200mV Default Strength: 100Ω Termination 2× Strength: 50Ω Termination 1.8V Parallel CMOS Interface Also Supported Programmable Gain for SNR/SFDR Trade-Off *适合于 PA l线性化等多载波、大带宽通讯应用

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