K4E8E324ED-EGCG 三代低功耗双倍数据率同步动态随机存储器

8Gb LPDDR3 SDRAM 178FBGA, 11x11.5 256M x32 (32M x32 x 8banks)

属性

制造商 SAMSUNG

电压 1.8 / 1.2 V/ 1.2 V

温度规格 -25°C~+70°C

速度 1066MHz

容量 8 Gb

功能介绍

LPDDR3-SDRAM is a high-speed synchronous DRAM device internally configured as an 8-Bank memory.

This device contains the following number of bits:

8Gb has 8,589,934,592 bits

LPDDR3 devices use a double data rate architecture on the Command/Address (CA) bus to reduce the number of input pins in the system. The 10-bit CA

bus contains command, address, and bank information. Each command uses one clock cycle, during which command information is transferred on both

the positive and negative edge of the clock.

These devices also use a double data rate architecture on the DQ pins to achieve high speed operation. The double data rate architecture is essentially

an 8n prefetch architecture with an interface designed to transfer two data bits per DQ every clock cycle at the I/O pins. A single read or write access for

the LPDDR3 SDRAM effectively consists of a single 8n-bit wide, one clock cycle data transfer at the internal DRAM core and eight corresponding n-bit

wide, one-half-clock-cycle data transfers at the I/O pins.

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