NT5CB256M16DP-EK 全新原装 DDR3

 

 

 

  JEDEC DDR3 Compliant

-8n Prefetch Architecture

 -Differential Clock(CK/CK)and Data Strobe(DQS/DQS)

-Double-data rate on DQs, DQSandDM

  lData Integrity

-AutoSelf Refresh (ASR)by DRAM built

-inTS-Auto Refreshand Self Refresh Modes

Power Saving Mode

-Partial Array Self Refresh (PASR)1

-Power Down Mode

  Signal Integrity

-Configurable DS for system compatibility

-ConfigurableOn-Die Termination

-ZQ Calibration for DS/ODT impedance accuracy via external ZQ pad (240 ohm ±1%) l

  Signal Synchronization

-Write Leveling via MR settings6

-Read Leveling via MPR

  Interface and Power Supply

-SSTL_15 for DDR3:VDD/VDDQ=1.5V(±0.075V)

-SSTL_1353for DDR3L:VDD/VDDQ=1.35V(-0.067/+0.1V)

 

MT29F64G08CBABAWP固带 10K 23+

KLM8G1GETF-B041 10K 23+

KLMBG2JETD-B041 10K 23+

KLMAG1JETD-B041 10K 23+

K4E6E304EC-EGCG 10K 23+

K4B4G1646E-BCNB 10K 23+

K4F6E3S4HM-MGCJ 10K 23+

K4AAG165WA-BCWE 10K 23+

K4B4G0846E-BCNB 10K 23+

K4UBE3D4AA-MGCL 10K 23+

K4UBE3D4AB-MGCL 10K 23+

K4U6E3S4AA-MGCR 10K 23+

全新原包原装可含税（香港可交）

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