SN74LVC125DCKR

· Available in the Texas Instruments · Ioff Supports Partial-Power-Down Mode

NanoStar™ and NanoFree™ Packages Operation

· Supports 5-V VCC Operation · Latch-Up Performance Exceeds 100 mA Per

· Inputs Accept Voltages to 5.5 V JESD 78, Class II

· Max tpd of 3.7 ns at 3.3 V · ESD Protection Exceeds JESD 22

· Low Power Consumption, 10-mA Max I – 2000-V Human-Body Model (A114-A) CC

· ±24-mA Output Drive at 3.3 V – 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

This bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable

(OE) input is high.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

SN74LVC125DCKR产品图片：

SN74LVC125DCKR参数：

型号：SN74LVC125DCKR

品牌：TI/NS

封装规格：SOT23-5

存储温度：-55-100°

存储环境：常温

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