W9812G6KH-6 原装SDRAM

2.5V AND 3V 8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI

 

W9812G6KH-6 原装SDRAM 的技术参数：

 

KLMBG2JETD-B041 10K 23+

KLMAG1JETD-B041 10K 23+

KLM8G1GETF-B041 10K 23+

KLM4G1FETE-B041 10K 23+

K4E8E324EB-EGCF 10K 23+

K4E6E304EB-EGCF 10K 23+

K4E6E304EC-EGCG 10K 23+

K4B4G1646E-BCNB 10K 23+

K4A8G165WB-BCRC 10K 23+

优势出，有需要的欢迎联系

 

W9812G6KH-6 原装SDRAM 的描述：

GENERAL DESCRIPTION W9812G6KH is a high-speed synchronous dynamic random access memory (SDRAM), organized as 2M words ′ 4 banks ′ 16 bits. W9812G6KH delivers a data bandwidth of up to 200M words per second.

 

To fully comply with the personal computer industrial standard, W9812G6KH is sorted into the following speed grades: -5, -5I, -5J, -6, -6I, -6J and -75. The -5/-5I grade parts are compliant to the 200MHz/CL3 specification (The -5I industrial grade which is guaranteed to support -40°C ≤ TA ≤ 85°C, the -5J industrial plus grade which is guaranteed to support -40°C ≤ TA ≤ 105°C).

 

 The -6/-6I grade parts are compliant to the 166MHz/CL3 specification (The -6I industrial grade which is guaranteed to support -40°C ≤ TA ≤ 85°C, the -6J industrial plus grade which is guaranteed to support -40°C ≤ TA ≤ 105°C).

 

The -75 grade parts is compliant to the 133MHz/CL3 specification. Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time.

 

 By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential burst to maximize its performance. W9812G6KH is ideal for main memory in high performance applications.

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