深圳市云迪科技有限公司专营进口原装IC，现货供应，价格优势，欢迎咨询。

描述：AD8345AREZ正交调制器，I/Q频率80MHz；16脚TSSOP封装；MAX电源电流76A；工作温度-40 °C到+85 °C；工作电源电压5.5V-2.7V。
BASEBAND I AND Q CHANNEL DRIVE
The I channel and Q channel baseband inputs should be driven
differentially. This is convenient as most modern high-speed
DACs have differential outputs. For optimal performance at
V S = 5 V, the drive signal should be a 1.2 V p-p differential
signal with a bias level of 0.7 V; that is, each input should swing
from 0.4 V to 1 V. If the AD8345 is being run on a lower supply
voltage, then the peak-to-peak voltage on the I and Q channel
inputs must be reduced to avoid input clipping. For example, at
a supply voltage of 2.7 V, a 200 mV p-p differential drive is
recommended. This results in a corresponding reduction in
output power (see Figure 3). The I and Q inputs have a large
input bandwidth of approximately 80 MHz. At lower baseband
input levels, the input bandwidth increases (see Figure 4).
If the baseband signal has a high peak-to-average ratio (such as
CDMA or WCDMA), then the rms signal strength must be
backed off from this peak level in order to prevent clipping of
the signal peaks.
Clipping of signal peaks tends to increase signal leakage into
adjacent channels. Backing off the I and Q signal strength, in
the manner recommended, reduces the output power by a
corresponding amount. This also applies to multicarrier
applications where the per-carrier output power is lower by
3 dB for each doubling of the number of output carriers.
The I and Q inputs have high input impedances because they
connect directly to the bases of PNP transistors. If a dc-coupled
filter is being used between a DAC and the modulator inputs,
then the filter must be terminated with the appropriate
resistance. If the filter is differential, then the termination
resistor should be connected across the I and Q differential
inputs

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